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| Athlon 64 (Socket 754) | ||||
|---|---|---|---|---|
| AMD Processors | Natural State | Sockets | L1/L2 Cache (Associativity) | Transistors |
(Clawhammer) (64-bit on-Die unbuffered DDR PC2700 mem controller; 4GB max) | 754 pins ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket 754 | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | ? million 0.13µm process 104mm² die |
| Athlon 64-2800+ MMX 3DNow! SSE SSE2 (Clawhammer) (64-bit on-Die unbuffered DDR PC3200 mem controller; 4GB max) March 30, 2004 - {$178} | 754 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.5v | Socket 754 | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Athlon 64-3000+ MMX 3DNow! SSE SSE2 (Clawhammer) (64-bit on-Die unbuffered DDR PC3200 mem controller; 4GB max) December 15, 2003 - {$218} | 754 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.5v | Socket 754 | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Athlon 64-3200+ MMX 3DNow! SSE SSE2 (Clawhammer) (64-bit on-Die unbuffered DDR PC3200 mem controller; 4GB max) September 23, 2003 - {$417} | 754 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.5v | Socket 754 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Athlon 64-3400+ MMX 3DNow! SSE SSE2 (Clawhammer) (64-bit on-Die unbuffered DDR PC3200 mem controller; 4GB max) January 6, 2004 - {$417} | 754 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.5v | Socket 754 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Athlon 64-3700+ MMX 3DNow! SSE SSE2 (Clawhammer) (64-bit on-Die unbuffered DDR PC3200 mem controller; 4GB max) June 1, 2004 - {$710} | 754 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.5v | Socket 754 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Athlon 64-2800+ MMX 3DNow! SSE SSE2 (Newcastle) (64-bit on-Die unbuffered DDR PC3200 mem controller; 4GB max) July, 2004 | 754 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.5v | Socket 754 | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 68.5 million 0.13µm process 144mm² die |
| Athlon 64-3000+ MMX 3DNow! SSE SSE2 (Newcastle) (64-bit on-Die unbuffered DDR PC3200 mem controller; 4GB max) July, 2004 - {$218} | 754 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.5v | Socket 754 | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 68.5 million 0.13µm process 144mm² die |
| Athlon 64-3200+ MMX 3DNow! SSE SSE2 (Newcastle) (64-bit on-Die unbuffered DDR PC3200 mem controller; 4GB max) July, 2004 - {$278} | 754 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.5v | Socket 754 | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 68.5 million 0.13µm process 144mm² die |
| Athlon 64-3400+ MMX 3DNow! SSE SSE2 (Newcastle) (64-bit on-Die unbuffered DDR PC3200 mem controller; 4GB max) July, 2004 - {$417} | 754 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.5v | Socket 754 | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 68.5 million 0.13µm process 144mm² die |
| AMD Processors | Natural State | Sockets | L1/L2 Cache (Associativity) | Transistors |
| Sempron-2600+ MMX 3DNow! SSE SSE2 (Paris) (64-bit on-Die unbuffered DDR PC3200 mem controller; 4GB max) (32-bit only) 2005 | 754 pins 1200MHz (200x6) (64-bit dual-pumped bus) 1.5v | Socket 754 | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) | ? million 0.13µm process 118mm² die |
| Sempron-2800+ MMX 3DNow! SSE SSE2 (Paris) (64-bit on-Die unbuffered DDR PC3200 mem controller; 4GB max) (32-bit only) 2005 | 754 pins 1400MHz (200x7) (64-bit dual-pumped bus) 1.5v | Socket 754 | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) | ? million 0.13µm process 118mm² die |
| Sempron-3000+ MMX 3DNow! SSE SSE2 (Paris) (64-bit on-Die unbuffered DDR PC3200 mem controller; 4GB max) (32-bit only) 2005 | 754 pins 1600MHz (200x8) (64-bit dual-pumped bus) 1.5v | Socket 754 | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) | ? million 0.13µm process 118mm² die |
| Sempron-3100+ MMX 3DNow! SSE SSE2 (Paris) (64-bit on-Die unbuffered DDR PC3200 mem controller; 4GB max) (32-bit only) July 28, 2004 - {$126} | 754 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.5v | Socket 754 | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) | ? million 0.13µm process 118mm² die |
| Sempron-3300+ MMX 3DNow! SSE SSE2 (Paris) (64-bit on-Die unbuffered DDR PC3200 mem controller; 4GB max) (32-bit only) 1Q 2005 | 754 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.5v | Socket 754 | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) | ? million 0.13µm process 118mm² die |
| Sempron-2500+ MMX 3DNow! SSE SSE2 SSE3 (Palermo) (64-bit on-Die unbuffered DDR mem controller) July 7, 2005 | 754 pins 1400MHz (200x7) (64-bit dual-pumped bus) 1.4v | Socket 754 | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) | 77 million 0.09µm process 84mm² die |
| Sempron-2600+ MMX 3DNow! SSE SSE2 SSE3 (Palermo) (64-bit on-Die unbuffered DDR mem controller) (32-bit only) February 15, 2005 | 754 pins 1600MHz (200x8) (64-bit dual-pumped bus) 1.4v | Socket 754 | 64KB data (2-way) 64KB instruction (2-way) 128KB on-Die unified L2 (16-way exclusive) | 77 million 0.09µm process 84mm² die |
| Sempron-2800+ MMX 3DNow! SSE SSE2 SSE3 (Palermo) (64-bit on-Die unbuffered DDR mem controller) (32-bit only) February 15, 2005 | 754 pins 1600MHz (200x8) (64-bit dual-pumped bus) 1.4v | Socket 754 | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) | 77 million 0.09µm process 84mm² die |
| Sempron-3000+ MMX 3DNow! SSE SSE2 SSE3 (Palermo) (64-bit on-Die unbuffered DDR mem controller) (32-bit only) February 15, 2005 | 754 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.4v | Socket 754 | 64KB data (2-way) 64KB instruction (2-way) 128KB on-Die unified L2 (16-way exclusive) | 77 million 0.09µm process 84mm² die |
| Sempron-3100+ MMX 3DNow! SSE SSE2 SSE3 (Palermo) (64-bit on-Die unbuffered DDR mem controller) (32-bit only) February 15, 2005 | 754 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.4v | Socket 754 | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) | 77 million 0.09µm process 84mm² die |
| Sempron-3300+ MMX 3DNow! SSE SSE2 SSE3 (Palermo) (64-bit on-Die unbuffered DDR mem controller) (32-bit only) April 18, 2005 | 754 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.4v | Socket 754 | 64KB data (2-way) 64KB instruction (2-way) 128KB on-Die unified L2 (16-way exclusive) | 77 million 0.09µm process 84mm² die |
| Sempron-3400+ MMX 3DNow! SSE SSE2 SSE3 (Palermo) (64-bit on-Die unbuffered DDR mem controller) (32-bit only) July 29, 2005 - {$134} | 754 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.4v | Socket 754 | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) | 77 million 0.09µm process 84mm² die |
| Athlon 64 (Socket 939) | ||||
|---|---|---|---|---|
| AMD Processors | Natural State | Sockets | L1/L2 Cache (Associativity) | Transistors |
(Newcastle) (128-bit on-Die unbuffered DDR PC3200 mem controller; 8GB max) [not released] | 939 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.5v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 68.5 million 0.13µm process 144mm² die |
(Newcastle) (128-bit on-Die unbuffered DDR PC3200 mem controller; 8GB max) [not released] | 939 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.5v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 68.5 million 0.13µm process 144mm² die |
| Athlon 64-3500+ MMX 3DNow! SSE SSE2 (Newcastle) (128-bit on-Die unbuffered DDR PC3200 mem controller; 8GB max) June 1, 2004 - {$500} | 939 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.5v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 68.5 million 0.13µm process 144mm² die |
| Athlon 64-3800+ MMX 3DNow! SSE SSE2 (Newcastle) (128-bit on-Die unbuffered DDR PC3200 mem controller; 8GB max) June 1, 2004 - {$720} | 939 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.5v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 68.5 million 0.13µm process 144mm² die |
| Athlon 64-4000+ MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die unbuffered DDR PC3200 mem controller; 8GB max) October 19, 2004 - {$729} | 939 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.5v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Athlon 64-4000+ MMX 3DNow! SSE SSE2 SSE3 (San Diego) (128-bit on-Die unbuffered DDR PC3200 mem controller; 8GB max) ? | 939 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.4v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
(Victoria) (128-bit on-Die unbuffered DDR PC3200 mem controller; 8GB max) [cancelled] | 939 pins ?MHz (200x?) (64-bit dual-pumped bus) 1.5v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) | ? million 0.09µm process ?mm² die |
| Athlon 64-3000+ MMX 3DNow! SSE SSE2 (Winchester) (128-bit on-Die unbuffered DDR PC3200 mem controller; 8GB max) 4Q 2004 | 939 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.4v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 68.5 million 0.09µm process 102mm² die |
| Athlon 64-3200+ MMX 3DNow! SSE SSE2 (Winchester) (128-bit on-Die unbuffered DDR PC3200 mem controller; 8GB max) 4Q 2004 | 939 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.4v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 68.5 million 0.09µm process 102mm² die |
| Athlon 64-3500+ MMX 3DNow! SSE SSE2 (Winchester) (128-bit on-Die unbuffered DDR PC3200 mem controller; 8GB max) 4Q 2004 | 939 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.4v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 68.5 million 0.09µm process 102mm² die |
(Winchester) (128-bit on-Die unbuffered DDR PC3200 mem controller; 8GB max) [not released] | 939 pins ?MHz (200x?) (64-bit dual-pumped bus) 1.4v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 68.5 million 0.09µm process 102mm² die |
| Athlon 64-3000+ MMX 3DNow! SSE SSE2 SSE3 (Venice) (128-bit on-Die unbuffered DDR PC3200 mem controller; 8GB max) May, 2005 | 939 pins 1800MHz (200x9) (64-bit dual-pumped bus) ?v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process ~120mm² die |
| Athlon 64-3200+ MMX 3DNow! SSE SSE2 SSE3 (Venice) (128-bit on-Die unbuffered DDR PC3200 mem controller; 8GB max) May, 2005 | 939 pins 2000MHz (200x10) (64-bit dual-pumped bus) ?v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process ~120mm² die |
| Athlon 64-3500+ MMX 3DNow! SSE SSE2 SSE3 (Venice) (128-bit on-Die unbuffered DDR PC3200 mem controller; 8GB max) May, 2005 | 939 pins 2200MHz (200x11) (64-bit dual-pumped bus) ?v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process ~120mm² die |
| Athlon 64-3800+ MMX 3DNow! SSE SSE2 SSE3 (Venice) (128-bit on-Die unbuffered DDR PC3200 mem controller; 8GB max) May, 2005 | 939 pins 2400MHz (200x12) (64-bit dual-pumped bus) ?v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process ~120mm² die |
| AMD Processors | Natural State | Sockets | L1/L2 Cache (Associativity) | Transistors |
| Athlon 64 X2-3800+ MMX 3DNow! SSE SSE2 SSE3 (Manchester) (128-bit on-Die unbuffered DDR mem controller) (dual core) August 1, 2005 - {$354} | 939 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.4v | Socket 939 | 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.09µm process ~147mm² die |
| Athlon 64 X2-4200+ MMX 3DNow! SSE SSE2 SSE3 (Manchester) (128-bit on-Die unbuffered DDR mem controller) (dual core) May 31, 2005 - {$537} | 939 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.4v | Socket 939 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.09µm process ~147mm² die |
| Athlon 64 X2-4600+ MMX 3DNow! SSE SSE2 SSE3 (Manchester) (128-bit on-Die unbuffered DDR mem controller) (dual core) May 31, 2005 - {$803} | 939 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.4v | Socket 939 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.09µm process ~147mm² die |
| Athlon 64 X2-4400+ MMX 3DNow! SSE SSE2 SSE3 (Toledo) (128-bit on-Die unbuffered DDR mem controller) (dual core) May 31, 2005 - {$581} | 939 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.4v | Socket 939 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process ~199mm² die |
| Athlon 64 X2-4800+ MMX 3DNow! SSE SSE2 SSE3 (Toledo) (128-bit on-Die unbuffered DDR mem controller) (dual core) May 31, 2005 - {$1001} | 939 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.4v | Socket 939 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process ~199mm² die |
| Athlon 64 X2-5000+ MMX 3DNow! SSE SSE2 SSE3 (Toledo) (128-bit on-Die unbuffered DDR mem controller) (dual core) May 23, 2006 - {$696} | 939 pins ???MHz (200x?) (64-bit dual-pumped bus) ?v | Socket 939 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process ~199mm² die |
| AMD Processors | Natural State | Sockets | L1/L2 Cache (Associativity) | Transistors |
| Sempron-3000+ MMX 3DNow! SSE SSE2 (Palermo) (128-bit on-Die unbuffered DDR mem controller) June, 2006 | 939 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.4v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 128KB on-Die unified L2 (16-way exclusive) | 77 million 0.09µm process 84mm² die |
| Sempron-3200+ MMX 3DNow! SSE SSE2 (Palermo) (128-bit on-Die unbuffered DDR mem controller) June, 2006 | 939 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.4v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) | 77 million 0.09µm process 84mm² die |
| Sempron-3400+ MMX 3DNow! SSE SSE2 (Palermo) (128-bit on-Die unbuffered DDR mem controller) June, 2006 | 939 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.4v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 128KB on-Die unified L2 (16-way exclusive) | 77 million 0.09µm process 84mm² die |
| Sempron-3500+ MMX 3DNow! SSE SSE2 (Palermo) (128-bit on-Die unbuffered DDR mem controller) June, 2006 | 939 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.4v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) | 77 million 0.09µm process 84mm² die |
| Athlon 64 (Socket AM2) (NOT compatible with Socket 940 CPUs!) | ||||
|---|---|---|---|---|
| AMD Processors | Natural State | Sockets | L1/L2 Cache (Associativity) | Transistors |
| Athlon 64-LE-1600 MMX 3DNow! SSE SSE2 SSE3 (Orleans) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) 2007 | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.4v | Socket AM2 Socket AM2+ | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 81 million 0.09µm process 103mm² die |
| Athlon 64-LE-1620 MMX 3DNow! SSE SSE2 SSE3 (Orleans) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) 2007 | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.4v | Socket AM2 Socket AM2+ | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 81 million 0.09µm process 103mm² die |
| Athlon 64-LE-1640 MMX 3DNow! SSE SSE2 SSE3 (Orleans) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) 2008? | 940 pins 2700MHz (200x13.5) (64-bit dual-pumped bus) 1.4v | Socket AM2 Socket AM2+ | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 81 million 0.09µm process 103mm² die |
| Athlon 64-3000+ MMX 3DNow! SSE SSE2 SSE3 (Orleans) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) May 23, 2006 | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.4v | Socket AM2 Socket AM2+ | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 81 million 0.09µm process 103mm² die |
| Athlon 64-3200+ MMX 3DNow! SSE SSE2 SSE3 (Orleans) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) May 23, 2006 | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.4v | Socket AM2 Socket AM2+ | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 81 million 0.09µm process 103mm² die |
| Athlon 64-3500+ MMX 3DNow! SSE SSE2 SSE3 (Orleans) (128-bit on-Die unbuffered DDR2 PC5800 mem controller; 8GB max) May 23, 2006 - {$189} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.25v or 1.4v | Socket AM2 Socket AM2+ | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 81 million 0.09µm process 103mm² die |
| Athlon 64-3800+ MMX 3DNow! SSE SSE2 SSE3 (Orleans) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) May 23, 2006 - {$290} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.4v | Socket AM2 Socket AM2+ | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 81 million 0.09µm process 103mm² die |
| Athlon 64-4000+ MMX 3DNow! SSE SSE2 SSE3 (Orleans) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) February 20, 2007 - {$102} | 940 pins 2600MHz (200x13) (64-bit dual-pumped bus) 1.4v | Socket AM2 Socket AM2+ | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 81 million 0.09µm process 103mm² die |
| Athlon 64-3500+ EE MMX 3DNow! SSE SSE2 SSE3 (Lima) (128-bit on-Die unbuffered DDR2 PC5800 mem controller; 8GB max) February 20, 2007 - {$88} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.35v | Socket AM2 Socket AM2+ | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 77 million 0.065µm process ?mm² die |
| Athlon 64-3800+ EE MMX 3DNow! SSE SSE2 SSE3 (Lima) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) February 20, 2007 - {$93} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.4v | Socket AM2 Socket AM2+ | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 77 million 0.065µm process ?mm² die |
| AMD Processors | Natural State | Sockets | L1/L2 Cache (Associativity) | Transistors |
| Athlon 64 X2-3800+ MMX 3DNow! SSE SSE2 SSE3 (Windsor) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) (dual core) May 23, 2006 - {$303} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.075v or 1.25v or 1.35v | Socket AM2 Socket AM2+ | 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.09µm process 183mm² die |
| Athlon 64 X2-4000+ MMX 3DNow! SSE SSE2 SSE3 (Windsor) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) (dual core) May 23, 2006 - {$328} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.25v or 1.35v or 1.4v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Athlon 64 X2-4200+ MMX 3DNow! SSE SSE2 SSE3 (Windsor) (128-bit on-Die unbuffered DDR2 PC5800 mem controller; 8GB max) (dual core) May 23, 2006 - {$365} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.25v or 1.35v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.09µm process 183mm² die |
| Athlon 64 X2-4400+ MMX 3DNow! SSE SSE2 SSE3 (Windsor) (128-bit on-Die unbuffered DDR2 PC5800 mem controller; 8GB max) (dual core) May 23, 2006 - {$470} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.25v or 1.35v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Athlon 64 X2-4600+ MMX 3DNow! SSE SSE2 SSE3 (Windsor) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) (dual core) May 23, 2006 - {$558} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.25v or 1.35v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.09µm process 183mm² die |
| Athlon 64 X2-4800+ MMX 3DNow! SSE SSE2 SSE3 (Windsor) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) (dual core) May 23, 2006 - {$645} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.25v or 1.35v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Athlon 64 X2-5000+ MMX 3DNow! SSE SSE2 SSE3 (Windsor) (128-bit on-Die unbuffered DDR2 PC5800 mem controller; 8GB max) (dual core) May 23, 2006 - {$696} | 940 pins 2600MHz (200x13) (64-bit dual-pumped bus) 1.25v or 1.35v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.09µm process 183mm² die |
| Athlon 64 X2-5200+ MMX 3DNow! SSE SSE2 SSE3 (Windsor) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) 2006? - {$403} | 940 pins 2600MHz (200x13) (64-bit dual-pumped bus) 1.25v or 1.35v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Athlon 64 X2-5400+ MMX 3DNow! SSE SSE2 SSE3 (Windsor) (128-bit on-Die unbuffered DDR2 PC5800 mem controller; 8GB max) (dual core) 2006? - {$485} | 940 pins 2800MHz (200x14) (64-bit dual-pumped bus) 1.35v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.09µm process 183mm² die |
| Athlon 64 X2-5600+ MMX 3DNow! SSE SSE2 SSE3 (Windsor) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) 2006? - {$505} | 940 pins 2800MHz (200x14) (64-bit dual-pumped bus) 1.35v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Athlon 64 X2-6000+ MMX 3DNow! SSE SSE2 SSE3 (Windsor) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) February 20, 2007 - {$464} | 940 pins 3000MHz (200x15) (64-bit dual-pumped bus) 1.4v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Athlon 64 X2-6400+ MMX 3DNow! SSE SSE2 SSE3 (Windsor) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) 2007 | 940 pins 3200MHz (200x16) (64-bit dual-pumped bus) 1.4v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Athlon X2 BE-2300 MMX 3DNow! SSE SSE2 SSE3 (Brisbane) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) (dual core) June 7, 2007 - {$86} | 940 pins 1900MHz (200x9.5) (64-bit dual-pumped bus) 1.25v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.065µm process 126mm² die |
| Athlon X2 BE-2350 MMX 3DNow! SSE SSE2 SSE3 (Brisbane) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) (dual core) June 7, 2007 - {$91} | 940 pins 2100MHz (200x10.5) (64-bit dual-pumped bus) 1.25v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.065µm process 126mm² die |
| Athlon X2 BE-2400 MMX 3DNow! SSE SSE2 SSE3 (Brisbane) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) (dual core) 2007 - {$104} | 940 pins 2300MHz (200x11.5) (64-bit dual-pumped bus) 1.25v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.065µm process 126mm² die |
| Athlon 64 X2-3600+ MMX 3DNow! SSE SSE2 SSE3 (Brisbane) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) (dual core) March, 2007 - {$102} | 940 pins 1900MHz (200x9.5) (64-bit dual-pumped bus) 1.35v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.065µm process 126mm² die |
| Athlon 64 X2-4000+ MMX 3DNow! SSE SSE2 SSE3 (Brisbane) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) (dual core) December 5, 2006 | 940 pins 2100MHz (200x10.5) (64-bit dual-pumped bus) 1.35v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.065µm process 126mm² die |
| Athlon 64 X2-4050e MMX 3DNow! SSE SSE2 SSE3 (Brisbane) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) (dual core) 2Q 2008 | 940 pins 2100MHz (200x10.5) (64-bit dual-pumped bus) 1.25v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.065µm process 126mm² die |
| Athlon 64 X2-4200+ MMX 3DNow! SSE SSE2 SSE3 (Brisbane) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) (dual core) 2007 | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.325v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.065µm process 126mm² die |
| Athlon 64 X2-4400+ MMX 3DNow! SSE SSE2 SSE3 (Brisbane) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) (dual core) December 5, 2006 2007 - 1.375v | 940 pins 2300MHz (200x11.5) (64-bit dual-pumped bus) 1.35v, 1.375 | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.065µm process 126mm² die |
| Athlon 64 X2-4450e MMX 3DNow! SSE SSE2 SSE3 (Brisbane) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) (dual core) 2Q 2008 | 940 pins 2300MHz (200x11.5) (64-bit dual-pumped bus) 1.25v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.065µm process 126mm² die |
| Athlon 64 X2-4600+ MMX 3DNow! SSE SSE2 SSE3 (Brisbane) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) (dual core) 2008 | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.375v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.065µm process 126mm² die |
| Athlon 64 X2-4800+ MMX 3DNow! SSE SSE2 SSE3 (Brisbane) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) (dual core) December 5, 2006 | 940 pins 2500MHz (200x12.5) (64-bit dual-pumped bus) 1.35v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.065µm process 126mm² die |
| Athlon 64 X2-4850e MMX 3DNow! SSE SSE2 SSE3 (Brisbane) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) (dual core) April 3, 2008 | 940 pins 2500MHz (200x12.5) (64-bit dual-pumped bus) 1.25v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.065µm process 126mm² die |
| Athlon 64 X2-5000+ MMX 3DNow! SSE SSE2 SSE3 (Brisbane) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) (dual core) December 5, 2006 | 940 pins 2600MHz (200x13) (64-bit dual-pumped bus) 1.35v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.065µm process 126mm² die |
| Athlon 64 X2-5200+ MMX 3DNow! SSE SSE2 SSE3 (Brisbane) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) (dual core) 2007 | 940 pins 2700MHz (200x13.5) (64-bit dual-pumped bus) 1.375v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.065µm process 126mm² die |
(Brisbane) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) (dual core) [not released] | 940 pins 2800MHz (200x14) (64-bit dual-pumped bus) 1.35v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.065µm process 126mm² die |
| Athlon 64 X2-6000+ MMX 3DNow! SSE SSE2 SSE3 (Brisbane) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) (dual core) 1H 2008 | 940 pins 3100MHz (200x15.5) (64-bit dual-pumped bus) 1.4v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.065µm process 126mm² die |
| Athlon 64 X2-??? MMX 3DNow! SSE SSE2 SSE3 SSE4 (Rana) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core, HT 3.0, DICE) 2008? | 940 pins ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) ?MB on-Die unified L2 (16-way exclusive) | ? million 0.065µm process ?mm² die |
| AMD Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
| Phenom 6??? MMX 3DNow! SSE SSE2 SSE3 SSE4 (Kuma) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (dual core, HT 3.0, DICE) 2008? | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) ?v | Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (?-way) | ? million 0.065µm process ?mm² die |
| Phenom 6??? MMX 3DNow! SSE SSE2 SSE3 SSE4 (Kuma) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (dual core, HT 3.0, DICE) 2008? | 940 pins ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (?-way) | ? million 0.065µm process ?mm² die |
| Phenom 9500 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Agena) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (quad core, HT 3.0, DICE) November 19, 2007 - {$251} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.25v | Socket AM2+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (?-way) | 463 million 0.065µm process 288mm² die |
| Phenom 9600 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Agena) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (quad core, HT 3.0, DICE) November 19, 2007 - {$283} | 940 pins 2300MHz (200x11.5) (64-bit dual-pumped bus) 1.25v | Socket AM2+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (?-way) | 463 million 0.065µm process 288mm² die |
(Agena) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (quad core, HT 3.0, DICE) [not released] | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) ?v | Socket AM2+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (?-way) | 463 million 0.065µm process 288mm² die |
(Agena) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (quad core, HT 3.0, DICE) [not released] | 940 pins 2600MHz (200x13) (64-bit dual-pumped bus) ?v | Socket AM2+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (?-way) | 463 million 0.065µm process 288mm² die |
| Phenom X3 8250e MMX 3DNow! SSE SSE2 SSE3 SSE4 (Toliman) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (tri core, HT 3.0, DICE) August 2008? | 940 pins 1900MHz (200x9.5) (64-bit dual-pumped bus) 1.25v | Socket AM2+ | 3x 64KB data (2-way) 3x 64KB instruction (2-way) 3x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (?-way) | 463 million 0.065µm process 288mm² die |
| Phenom X3 8400 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Toliman) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (tri core, HT 3.0, DICE) March 27, 2008 | 940 pins 2100MHz (200x10.5) (64-bit dual-pumped bus) 1.25v | Socket AM2+ | 3x 64KB data (2-way) 3x 64KB instruction (2-way) 3x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (?-way) | 463 million 0.065µm process 288mm² die |
| Phenom X3 8450e MMX 3DNow! SSE SSE2 SSE3 SSE4 (Toliman) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (tri core, HT 3.0, DICE) August 2008? | 940 pins 2100MHz (200x10.5) (64-bit dual-pumped bus) 1.25v | Socket AM2+ | 3x 64KB data (2-way) 3x 64KB instruction (2-way) 3x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (?-way) | 463 million 0.065µm process 288mm² die |
| Phenom X3 8450 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Toliman) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (tri core, HT 3.0, DICE) April 23, 2008 - {$145} | 940 pins 2100MHz (200x10.5) (64-bit dual-pumped bus) 1.25v | Socket AM2+ | 3x 64KB data (2-way) 3x 64KB instruction (2-way) 3x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (?-way) | 463 million 0.065µm process 288mm² die |
| Phenom X3 8600 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Toliman) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (tri core, HT 3.0, DICE) March 27, 2008 | 940 pins 2300MHz (200x11.5) (64-bit dual-pumped bus) 1.25v | Socket AM2+ | 3x 64KB data (2-way) 3x 64KB instruction (2-way) 3x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (?-way) | 463 million 0.065µm process 288mm² die |
| Phenom X3 8650 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Toliman) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (tri core, HT 3.0, DICE) April 23, 2008 - {$165} | 940 pins 2300MHz (200x11.5) (64-bit dual-pumped bus) 1.25v | Socket AM2+ | 3x 64KB data (2-way) 3x 64KB instruction (2-way) 3x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (?-way) | 463 million 0.065µm process 288mm² die |
| Phenom X3 8750 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Toliman) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (tri core, HT 3.0, DICE) April 23, 2008 - {$195} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.25v | Socket AM2+ | 3x 64KB data (2-way) 3x 64KB instruction (2-way) 3x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (?-way) | 463 million 0.065µm process 288mm² die |
| Phenom X3 8??? MMX 3DNow! SSE SSE2 SSE3 SSE4 (Toliman) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (tri core, HT 3.0, DICE) 2008? | 940 pins ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket AM2+ | 3x 64KB data (2-way) 3x 64KB instruction (2-way) 3x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (?-way) | 463 million 0.065µm process 288mm² die |
| Phenom X4 9100e MMX 3DNow! SSE SSE2 SSE3 SSE4 (Agena) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (quad core, HT 3.0, DICE) March 27, 2008 | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.15v | Socket AM2+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (?-way) | 463 million 0.065µm process 288mm² die |
| Phenom X4 9150e MMX 3DNow! SSE SSE2 SSE3 SSE4 (Agena) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (quad core, HT 3.0, DICE) July 1, 2008 - {$175} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.125v | Socket AM2+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (?-way) | 463 million 0.065µm process 288mm² die |
| Phenom X4 9350e MMX 3DNow! SSE SSE2 SSE3 SSE4 (Agena) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (quad core, HT 3.0, DICE) July 1, 2008 - {$195} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.125v | Socket AM2+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (?-way) | 463 million 0.065µm process 288mm² die |
| Phenom X4 9550 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Agena) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (quad core, HT 3.0, DICE) March 27, 2008 - {$209} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.25v | Socket AM2+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (?-way) | 463 million 0.065µm process 288mm² die |
| Phenom X4 9650 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Agena) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (quad core, HT 3.0, DICE) March 27, 2008 - {$215} | 940 pins 2300MHz (200x11.5) (64-bit dual-pumped bus) 1.25v | Socket AM2+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (?-way) | 463 million 0.065µm process 288mm² die |
| Phenom X4 9750 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Agena) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (quad core, HT 3.0, DICE) March 27, 2008 - {$215} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.25v or 1.3v | Socket AM2+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (?-way) | 463 million 0.065µm process 288mm² die |
| Phenom X4 9850 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Agena) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (quad core, HT 3.0, DICE) March 27, 2008 - {$235} | 940 pins 2500MHz (200x12.5) (64-bit dual-pumped bus) 1.25v | Socket AM2+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (?-way) | 463 million 0.065µm process 288mm² die |
| Phenom X4 9950 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Agena) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (quad core, HT 3.0, DICE) July 1, 2008 - {$235} | 940 pins 2600MHz (200x13) (64-bit dual-pumped bus) 1.3v | Socket AM2+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (?-way) | 463 million 0.065µm process 288mm² die |
| Phenom X4 9??? MMX 3DNow! SSE SSE2 SSE3 SSE4 (Agena) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (quad core, HT 3.0, DICE) 2008? | 940 pins ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket AM2+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (?-way) | 463 million 0.065µm process 288mm² die |
| Phenom X4 9??? MMX 3DNow! SSE SSE2 SSE3 SSE4 (Deneb) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (quad core, HT 3.0, DICE) 4Q 2008? | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) ?v | Socket AM2+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) ?MB on-Die shared L3 (?-way) | ? million 0.045µm process ?mm² die |
| Phenom X4 9??? MMX 3DNow! SSE SSE2 SSE3 SSE4 (Deneb) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (quad core, HT 3.0, DICE) 4Q 2008? | 940 pins 2800MHz (200x14) (64-bit dual-pumped bus) ?v | Socket AM2+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) ?MB on-Die shared L3 (?-way) | ? million 0.045µm process ?mm² die |
| Phenom X4 9??? MMX 3DNow! SSE SSE2 SSE3 SSE4 (Deneb) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (quad core, HT 3.0, DICE) 2008? | 940 pins ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket AM2+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) ?MB on-Die shared L3 (?-way) | ? million 0.045µm process ?mm² die |
| Phenom X4 9??? MMX 3DNow! SSE SSE2 SSE3 SSE4 (Ridgeback) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (quad core, HT 3.0, DICE) 2008? | 940 pins ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket AM2+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 6MB on-Die shared L3 (?-way) | ? million 0.045µm process ?mm² die |
| Phenom X4 ??? MMX 3DNow! SSE SSE2 SSE3 SSE4 (Heka) (128-bit on-Die unbuffered DDR3 PC? mem controller) (quad core, HT 3.0, DICE) 2008? | ? pins ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket AM3 | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) ?MB on-Die shared L3 (?-way) | ? million 0.045µm process ?mm² die |
| AMD Processors | Natural State | Sockets | L1/L2 Cache (Associativity) | Transistors |
| Sempron-2800+ MMX 3DNow! SSE SSE2 SSE3 (Manila) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) May 23, 2006 | 940 pins 1600MHz (200x8) (64-bit dual-pumped bus) 1.4v | Socket AM2 Socket AM2+ | 64KB data (2-way) 64KB instruction (2-way) 128KB on-Die unified L2 (16-way exclusive) | 81 million 0.09µm process 103mm² die |
| Sempron-3000+ MMX 3DNow! SSE SSE2 SSE3 (Manila) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) May 23, 2006 - {$77} | 940 pins 1600MHz (200x8) (64-bit dual-pumped bus) 1.25v or 1.4v | Socket AM2 Socket AM2+ | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) | 81 million 0.09µm process 103mm² die |
| Sempron-3200+ MMX 3DNow! SSE SSE2 SSE3 (Manila) (128-bit on-Die unbuffered DDR2 PC5800 mem controller; 8GB max) May 23, 2006 - {$87} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.25v or 1.4v | Socket AM2 Socket AM2+ | 64KB data (2-way) 64KB instruction (2-way) 128KB on-Die unified L2 (16-way exclusive) | 81 million 0.09µm process 103mm² die |
| Sempron-3400+ MMX 3DNow! SSE SSE2 SSE3 (Manila) (128-bit on-Die unbuffered DDR2 PC5800 mem controller; 8GB max) May 23, 2006 - {$97} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.25v or 1.4v | Socket AM2 Socket AM2+ | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) | 81 million 0.09µm process 103mm² die |
| Sempron-3500+ MMX 3DNow! SSE SSE2 SSE3 (Manila) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) May 23, 2006 - {$109} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.25v or 1.4v | Socket AM2 Socket AM2+ | 64KB data (2-way) 64KB instruction (2-way) 128KB on-Die unified L2 (16-way exclusive) | 81 million 0.09µm process 103mm² die |
| Sempron-3600+ MMX 3DNow! SSE SSE2 SSE3 (Manila) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) May 23, 2006 - {$123} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.4v | Socket AM2 Socket AM2+ | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) | 81 million 0.09µm process 103mm² die |
| Sempron-3800+ MMX 3DNow! SSE SSE2 SSE3 (Manila) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) 2007? - {$108} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.4v | Socket AM2 Socket AM2+ | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) | 81 million 0.09µm process 103mm² die |
| Sempron-LE-1100 MMX 3DNow! SSE SSE2 SSE3 (Sparta) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) 4Q 2007 - {$37} | 940 pins 1900MHz (200x9.5) (64-bit dual-pumped bus) 1.4v | Socket AM2 Socket AM2+ | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) | 81 million 0.065µm process ?mm² die |
| Sempron-LE-1150 MMX 3DNow! SSE SSE2 SSE3 (Sparta) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) 4Q 2007 - {$42} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.4v | Socket AM2 Socket AM2+ | 64KB data (2-way) 64KB instruction (2-way) 256KB on-Die unified L2 (16-way exclusive) | 81 million 0.065µm process ?mm² die |
| Sempron-LE-1200 MMX 3DNow! SSE SSE2 SSE3 (Sparta) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) 4Q 2007 - {$48} | 940 pins 2100MHz (200x10.5) (64-bit dual-pumped bus) 1.4v | Socket AM2 Socket AM2+ | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 81 million 0.065µm process ?mm² die |
| Sempron-LE-1250 MMX 3DNow! SSE SSE2 SSE3 (Sparta) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) 4Q 2007 - {$53} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.4v | Socket AM2 Socket AM2+ | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 81 million 0.065µm process ?mm² die |
| Sempron-??? MMX 3DNow! SSE SSE2 SSE3 SSE4 (Spica) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (HT 3.0, DICE) 2008? | 940 pins ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket AM2+ | 64KB data (2-way) 64KB instruction (2-way) ?KB on-Die unified L2 (16-way exclusive) | ? million 0.065µm process ?mm² die |
| Business-Class Athlon / Phenom | ||||
|---|---|---|---|---|
| AMD Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
| Athlon 1640B MMX 3DNow! SSE SSE2 SSE3 (Brisbane) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) April 28, 2008 - {$50} | 940 pins 2700MHz (200x13.5) (64-bit dual-pumped bus) 1.4v | Socket AM2 Socket AM2+ | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.065µm process 126mm² die |
| Athlon X2-4450B MMX 3DNow! SSE SSE2 SSE3 (Brisbane) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) (dual core) April 28, 2008 - {$85} | 940 pins 2300MHz (200x11.5) (64-bit dual-pumped bus) 1.25v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.065µm process 126mm² die |
| Athlon X2-5000B MMX 3DNow! SSE SSE2 SSE3 (Brisbane) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) (dual core) April 28, 2008 - {$95} | 940 pins 2600MHz (200x13) (64-bit dual-pumped bus) 1.375v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.065µm process 126mm² die |
| Athlon X2-5200B MMX 3DNow! SSE SSE2 SSE3 (Brisbane) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) (dual core) April 28, 2008 - {$110} | 940 pins 2700MHz (200x13.5) (64-bit dual-pumped bus) 1.375v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.065µm process 126mm² die |
| Athlon X2-5400B MMX 3DNow! SSE SSE2 SSE3 (Brisbane) (128-bit on-Die unbuffered DDR2 PC6400 mem controller; 8GB max) (dual core) April 28, 2008 - {$120} | 940 pins 2800MHz (200x14) (64-bit dual-pumped bus) 1.35v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 512KB on-Die unified L2 (16-way exclusive) | 154 million 0.065µm process 126mm² die |
| Phenom X3 8600B MMX 3DNow! SSE SSE2 SSE3 SSE4 (Toliman) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (tri core, HT 3.0, DICE) April 28, 2008 - {$175} | 940 pins 2300MHz (200x11.5) (64-bit dual-pumped bus) 1.25v | Socket AM2+ | 3x 64KB data (2-way) 3x 64KB instruction (2-way) 3x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (?-way) | 463 million 0.065µm process 288mm² die |
| Phenom X4 9600B MMX 3DNow! SSE SSE2 SSE3 SSE4 (Agena) (128-bit on-Die unbuffered DDR2 PC8500 mem controller) (quad core, HT 3.0, DICE) April 28, 2008 - {$230} | 940 pins 2300MHz (200x11.5) (64-bit dual-pumped bus) 1.25v | Socket AM2+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (?-way) | 463 million 0.065µm process 288mm² die |
| Athlon 64 FX | ||||
|---|---|---|---|---|
| AMD Processors | Natural State | Sockets | L1/L2/L3 Cache (Associativity) | Transistors |
| Athlon 64 FX-51 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) September 23, 2003 - {$733} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Athlon 64 FX-53 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) March 18, 2004 - {$733} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Athlon 64 FX-53 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die unbuffered DDR PC3200 mem controller; 8GB max) June 1, 2004 - {$799} | 939 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.5v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Athlon 64 FX-55 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die unbuffered DDR PC3200 mem controller; 8GB max) October 19, 2004 - {$827} | 939 pins 2600MHz (200x13) (64-bit dual-pumped bus) 1.5v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Athlon 64 FX-57 MMX 3DNow! SSE SSE2 SSE3 (San Diego) (128-bit on-Die unbuffered DDR PC3200 mem controller; 8GB max) June 27, 2005 - {$1031} | 939 pins 2800MHz (200x14) (64-bit dual-pumped bus) 1.4v | Socket 939 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Athlon 64 FX-62 MMX 3DNow! SSE SSE2 SSE3 (Toledo) (128-bit on-Die unbuffered DDR mem controller) (dual core) May 23, 2006 - {$1031} | 940 pins 2800MHz (200x14) (64-bit dual-pumped bus) 1.4v | Socket AM2 Socket AM2+ | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process ~199mm² die |
| Athlon 64 FX-60 MMX 3DNow! SSE SSE2 SSE3 (Toledo) (128-bit on-Die unbuffered DDR mem controller) (dual core) January 10, 2006 - {$1031} | 939 pins 2600MHz (200x13) (64-bit dual-pumped bus) 1.35v | Socket 939 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process ~199mm² die |
| Athlon 64 FX-62 MMX 3DNow! SSE SSE2 SSE3 (Toledo) (128-bit on-Die unbuffered DDR mem controller) (dual core) May 23, 2006 - {$1031} | 939 pins 2800MHz (200x14) (64-bit dual-pumped bus) 1.4v | Socket 939 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process ~199mm² die |
| Athlon 64 FX-70 MMX 3DNow! SSE SSE2 SSE3 (Windsor) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) November 30, 2006 - {$599} | 1207 balls 2600MHz (200x13) (64-bit dual-pumped bus) 1.4v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Athlon 64 FX-72 MMX 3DNow! SSE SSE2 SSE3 (Windsor) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) November 30, 2006 - {$799} | 1207 balls 2800MHz (200x14) (64-bit dual-pumped bus) 1.4v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Athlon 64 FX-74 MMX 3DNow! SSE SSE2 SSE3 (Windsor) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) November 30, 2006 - {$999} | 1207 balls 3000MHz (200x15) (64-bit dual-pumped bus) 1.4v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Athlon 64 FX-76 MMX 3DNow! SSE SSE2 SSE3 (Windsor) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (dual core) 2008? | 1207 balls 3200MHz (200x16) (64-bit dual-pumped bus) 1.4v | Socket F | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 227 million 0.09µm process 235mm² die |
| Phenom FX-80 MMX 3DNow! SSE SSE2 SSE3 SSE4 (Agena FX) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) 2008? | 1207 balls 2200MHz (200x11) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB data (2-way) 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (?-way) | 463 million 0.065µm process 288mm² die |
| Phenom FX-??? MMX 3DNow! SSE SSE2 SSE3 SSE4 (Agena FX) (128-bit on-Die unbuffered DDR2 PC6400 mem controller) (quad core, HT 3.0, DICE) 2008? | 1207 balls ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket F+ | 4x 64KB instruction (2-way) 4x 512KB on-Die unified L2 (16-way exclusive) 2MB on-Die shared L3 (?-way) | 463 million 0.065µm process 288mm² die |
| Opteron (Socket 940) (NOT compatible with Socket AM2 CPUs!) | ||||
|---|---|---|---|---|
| AMD Processors | Natural State | Sockets | L1/L2 Cache (Associativity) | Transistors |
(Clawhammer DP) (128-bit on-Die DDR PC2700 mem controller; 8GB max) [not released] | 940 pins ?MHz (200x?) (64-bit dual-pumped bus) ?v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 512KB on-Die unified L2 (16-way exclusive) | ? million 0.13µm process 104mm² die |
| Opteron-140 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) June 30, 2003 - {$229} | 940 pins 1400MHz (200x7) (64-bit dual-pumped bus) 1.5v or 1.55v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron-140EE MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) January, 2005 | 940 pins 1400MHz (200x7) (64-bit dual-pumped bus) 1.15v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron-142 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) June 30, 2003 - {$438} | 940 pins 1600MHz (200x8) (64-bit dual-pumped bus) 1.5v or 1.55v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron-144 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) June 30, 2003 - {$669} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.5v or 1.55v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron-146 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) September 9, 2003 - {$669} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron-146HE MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 2005? | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) ?v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron-148 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) November 17, 2003 - {$733} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron-150 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) May 18, 2004 - {$637} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron-240 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) April 22, 2003 - {$283} | 940 pins 1400MHz (200x7) (64-bit dual-pumped bus) 1.5v or 1.55v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron-240EE MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) January, 2005 | 940 pins 1400MHz (200x7) (64-bit dual-pumped bus) 1.15v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron-242 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) April 22, 2003 - {$690} | 940 pins 1600MHz (200x8) (64-bit dual-pumped bus) 1.5v or 1.55v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron-244 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) April 22, 2003 - {$794} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.5v or 1.55v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron-246 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) August 5, 2003 - {$794} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron-246HE MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) January, 2005 | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) ?v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron-248 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) November 17, 2003 - {$913} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron-250 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) May 18, 2004 - {$851} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron-840 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) June 30, 2003 - {$749} | 940 pins 1400MHz (200x7) (64-bit dual-pumped bus) 1.5v or 1.55v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron-840EE MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) January, 2005 | 940 pins 1400MHz (200x7) (64-bit dual-pumped bus) 1.15v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron-842 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) June 30, 2003 - {$1299} | 940 pins 1600MHz (200x8) (64-bit dual-pumped bus) 1.5v or 1.55v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron-844 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC2700 mem controller; 8GB max) June 30, 2003 - {$2149} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.5v or 1.55v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron-846 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) September 9, 2003 - {$3199} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron-846HE MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 2005? | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) ?v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron-848 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) November 17, 2003 - {$3199} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron-850 MMX 3DNow! SSE SSE2 (Sledgehammer) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) May 18, 2004 - {$1514} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.5v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 106 million 0.13µm process 193mm² die |
| Opteron-146 MMX 3DNow! SSE SSE2 (Venus) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.4v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron-148HE MMX 3DNow! SSE SSE2 (Venus) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 1Q 2005 | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.3v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron-152 MMX 3DNow! SSE SSE2 (Venus) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 2006 | 940 pins 2600MHz (200x13) (64-bit dual-pumped bus) ?v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron-154 MMX 3DNow! SSE SSE2 (Venus) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 2006 | 940 pins 2800MHz (200x14) (64-bit dual-pumped bus) ?v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron-156 MMX 3DNow! SSE SSE2 (Venus) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 2006 | 940 pins 3000MHz (200x15) (64-bit dual-pumped bus) ?v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron-242 MMX 3DNow! SSE SSE2 SSE3 (Troy) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$163} | 940 pins 1600MHz (200x8) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron-244 MMX 3DNow! SSE SSE2 SSE3 (Troy) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$209} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron-246 MMX 3DNow! SSE SSE2 SSE3 (Troy) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$316} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.35v or 1.4v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron-248 MMX 3DNow! SSE SSE2 SSE3 (Troy) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$455} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.35v or 1.4v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron-248HE MMX 3DNow! SSE SSE2 SSE3 (Troy) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 1Q 2005 | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.3v or 1.4v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron-250 MMX 3DNow! SSE SSE2 SSE3 (Troy) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$690} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron-252 MMX 3DNow! SSE SSE2 SSE3 (Troy) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$851} | 940 pins 2600MHz (200x13) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron-254 MMX 3DNow! SSE SSE2 SSE3 (Troy) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) October, 2005 - {$851} | 940 pins 2800MHz (200x14) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron-256 MMX 3DNow! SSE SSE2 SSE3 (Troy) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 2006 | 940 pins 3000MHz (200x15) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron-842 MMX 3DNow! SSE SSE2 SSE3 (Athens) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$698} | 940 pins 1600MHz (200x8) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron-844 MMX 3DNow! SSE SSE2 SSE3 (Athens) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$698} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron-846 MMX 3DNow! SSE SSE2 SSE3 (Athens) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$698} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.35v or 1.4v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron-848 MMX 3DNow! SSE SSE2 SSE3 (Athens) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$873} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron-848HE MMX 3DNow! SSE SSE2 SSE3 (Athens) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 1Q 2005 | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.3v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron-850 MMX 3DNow! SSE SSE2 SSE3 (Athens) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$1165} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron-852 MMX 3DNow! SSE SSE2 SSE3 (Athens) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) February 14, 2005 - {$1514} | 940 pins 2600MHz (200x13) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron-854 MMX 3DNow! SSE SSE2 SSE3 (Athens) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) August, 2005 | 940 pins 2800MHz (200x14) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron-856 MMX 3DNow! SSE SSE2 SSE3 (Athens) (128-bit on-Die registered DDR PC3200 mem controller; 8GB max) 2006 | 940 pins 3000MHz (200x15) (64-bit dual-pumped bus) 1.35v | Socket 940 | 64KB data (2-way) 64KB instruction (2-way) 1MB on-Die unified L2 (16-way exclusive) | 114 million 0.09µm process 115mm² die |
| Opteron-165 MMX 3DNow! SSE SSE2 SSE3 (Denmark) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) August 24, 2005 - {$637} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) ?v | Socket 940 | 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron-165EE MMX 3DNow! SSE SSE2 SSE3 (Denmark) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) 2H 2005 | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.15v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron-170 MMX 3DNow! SSE SSE2 SSE3 (Denmark) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) August 24, 2005 - {$799} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) ?v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron-175 MMX 3DNow! SSE SSE2 SSE3 (Denmark) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) August 24, 2005 - {$999} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) ?v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron-180 MMX 3DNow! SSE SSE2 SSE3 (Denmark) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) October 24, 2005 - {$799} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) ?v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron-185 MMX 3DNow! SSE SSE2 SSE3 (Denmark) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) April, 2006? - {$} | 940 pins 2600MHz (200x13) (64-bit dual-pumped bus) ?v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron-260HE MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) 2H 2005 | 940 pins 1600MHz (200x8) (64-bit dual-pumped bus) 1.15v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron-265 MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) August 4, 2005 - {$851} | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.35v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron-265HE MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) 2H 2005 | 940 pins 1800MHz (200x9) (64-bit dual-pumped bus) 1.15v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron-270 MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) August 4, 2005 - {$1051} | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.35v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron-270HE MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) 2H 2005 | 940 pins 2000MHz (200x10) (64-bit dual-pumped bus) 1.15v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron-275 MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) August 4, 2005 - {$1299} | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.35v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron-275HE MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) 2006 | 940 pins 2200MHz (200x11) (64-bit dual-pumped bus) 1.15v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron-280 MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) September 26, 2005 - {$1299} | 940 pins 2400MHz (200x12) (64-bit dual-pumped bus) 1.35v | Socket 940 | 2x 64KB data (2-way) 2x 64KB instruction (2-way) 2x 1MB on-Die unified L2 (16-way exclusive) | 233 million 0.09µm process 199mm² die |
| Opteron-285 MMX 3DNow! SSE SSE2 SSE3 (Italy) (128-bit on-Die registered DDR PC3200 mem controller) (dual core) March 6, 2006 - {$1051} | 940 pins 2600M | |||