Alan M. Finn, Ph.D.

 

United Technologies Research Center

19 Cedar Ridge Drive

411 Silver Lane

Hebron, CT 06248

E. Hartford, CT 06108

(860) 228-1259

(860) 610-7737

AlanFinn@erols.com

Alan@utrc.utc.com

Alan’s homepage

 

Summary

 

Expert in embedded computer systems with emphasis on industrial applications such as embedded controls, remote monitoring, and reliability. Extensive experience in diagnostics and prognostics, mapping algorithms to architectures, performance optimization, digital signal processing (DSP), communications, and fault-tolerance.

 

Twenty years experience in increasingly responsible technical and program management positions at United Technologies, Allied/Bendix, and IBM. Proven ability in strategic planning, leadership, and technology transfer.

 

Author or co-author of 16 externally published papers and 18 patents.

 

Education

 

Cornell University

Ph.D. in Electrical Engineering

1983

Cornell University

M. Eng. in Electrical Engineering

1980

Rensselaer Polytechnic Institute

B.S. in Electrical Engineering

1977

Rensselaer Polytechnic Institute

B.S. in Mathematics

1977

 

 

Experience and Selected Accomplishments

 

United Technologies Research Center - August 1986 to Present (back to top)

 

Research Fellow performing original research and consulting in diagnostics and prognostics, computer architecture, digital signal processing, and fault-tolerance for embedded computer systems. Responsible for strategic technical planning, external resource development, program planning and management, intellectual property, technology transfer, publication of research, staffing, and budgeting.

 

Appointed Research Fellow for Diagnostics and Prognostics, February 2002. Presently leading HVAC prognostics and helicopter life extension projects. Led innovation team for elevator position reference system. Managed adaptive controls, implementation, and diagnostics for CO2 Heat Pump.  Received fifth Outstanding Achievement Award.

 

Managed Estimation and Decision group: 8 direct reports. Responsible for strategic technical planning, technical leadership and mentoring, program planning, staffing, budgeting, personnel development, and performance reviews.

 

Developed hands-free Cabin Communication System (CCS). CCS uses beamforming microphones, acoustic echo cancellation, and Wiener noise filtering for enhanced passenger communication in minivans, helicopters, etc. Developed DSP algorithms, performed systems-level optimization, and built hardware demonstrator. Provided demonstrations to OEMs and helped secure launch customer. Received fourth Outstanding Achievement Award.

 

Invented reliable remote-entry products with cryptographically secure user authentication for automotive division. Generated over $155 million in sales through 2001. Performed analysis of competitor’s products. Achieved patent protection and increased market share for division. Received third Outstanding Achievement Award.

 

Contributed to design of next generation sonar signal processor. Established high-level simulation methodology; wrote custom simulator; developed critical hardware and software optimizations for shared memory multiprocessor. Major contributor to successful $20 million proposal and $15 million sole-source award.

 

Led strategic planning team for Active Noise and Vibration Control (ANVC) research. Developed long-term plan; won funding; established program; designed message passing multiprocessor laboratory controller. Designed ANVC products for helicopter division. Received first and second Outstanding Achievement Awards.

 

Allied/Bendix Aerospace Technology Center - June 1983 to July 1986 (back to top)

 

Conducted research and development for an ultra-reliable distributed computer system for real-time control applications. Responsible for definition of system architecture. Specified, designed, implemented, and tested standard-cell chips.  Wrote research proposals and technical papers. Participated in hiring, IR&D reviews.

 

Major contributor to system-level design and system partitioning. Invented fault-tolerant synchronization technique, wrote custom simulator, simulated high-level design, translated high-level design to digital logic design, implemented as a standard cell chip. Designed transmitter subsystem and implemented as a standard cell chip.

 

Wrote expert system for Markov model generation. Presentation at NASA prompted their development of ASSIST language for automatic Markov model generation.

 

I.B.M. Corporation - August 1977 to August 1979 (back to top)

 

Participated in design, modeling, simulation, and test of hardware for 3081 I/O channel.

Wrote and tested system software for OS/VS 3.7 operating system.

 

Wrote microcode for 3081 I/O channel and software for automated hardware test. Received Outstanding Achievement award.

 

Graduated at top of class in Systems Programming School. Expert in MVS, JCL, PL/S. Designed, coded, and tested SUs for OS/VS 3.7.

 

Additional Technical Expertise (back to top)

 

Expert in Numerical Linear Algebra, Galois Field Mathematics, LMS Adaptive Controls

Proficient in Matlab, Mathematica, Assist (Markov Modeling), TeX

Skilled programmer in C, Pascal, Fortran.

 

Patents (back to top)

 

US 4805107, US 4816989, US 4914657, US 4933940, US 4972415, US 4980857,
US 5191610, US 5363448, US 5377270, US 5398284, US 5619575, US 5649014,
US 5682024, US 5699437, US 5831227, US 5940002, US 6314394, US 65356091
(also US RE036181, US RE36752)

 

8 applications pending.

1 Assigned to Lear Corporation as part of divestiture of United Technologies Automotive

 

Professional and Civic Activities (back to top)

 

Member IEEE

Member Vibration Institute

Member MFPT Diagnostics & Signal Analysis Committee

Member of Graduate Committee for Alex Dean, CMU, 2000.

Member of Graduate Committee for Nitin Vaidya, Ph.D., U. Mass, Amherst, 1993

Program Committee, Fault Tolerance Computing Symposium, 1992

Paper Referee, Fault Tolerance Computing Symposium, 1991.

Session Chair, Computers in Aerospace VII Conference, 1989.

Member of Graduate Committee for P. Thambidurai, Ph.D., Duke University, 1988.

Member of Hebron Board of Education, 1995 to present, vice-chair 1996-2002.

 

Publications2 (back to top)

 

‘Remote Entry Authentication and Security’, Proc. 1994 Intl. Congress on Transportation Electronics, Detroit, pp. 503-508, Oct. 1994.

 

Simulation of Multiple Access Protocols for Real-Time Control’, Simulation, v. 58, n. 2, pp. 123-130, Feb. 1992.

 

‘Transient Parameter Estimation by SVD-Based Wigner Distribution’, Chapter 24, in SVD and Signal Processing II, R. Vaccaro, ed., Elsevier Sci. Pub., Amsterdam, 1991.

 

‘A Fast Implementation of the Complex Singular Value Decomposition on the Connection Machine’, Proc. ICASSP 91, Toronto, pp. 1129-1132, May 1991.

 

‘Signal Enhancement for Diagnostic Signal Analysis’, Proc. ICASSP 91, Toronto, pp. 3281-3284, May 1991.

 

‘Modeling and Simulation of an i860-Based Multiprocessor’, Proc. 24th Annual Simulation Symp., New Orleans, pp. 91-97, Apr. 1991.

 

‘Diagnostic Signal Analysis Using Rank Reduction and the Wigner Distribution’, Proc. 24th Asilomar Conf. on Sig. Sys. and Comp, Asilomar, pp. 1068-1072, Nov. 1990.

 

‘Radar Adaptive Beamforming Algorithms and Architectures’, Proc. 9th Digital Avionics Sys. Conf., Virginia Beach, pp. 194-199, Oct. 1990.

 

The System Effect of Single Event Upsets’, Proc. 7th Computers in Aerospace Conf., Monterey, pp. 994-1002, Oct. 1989.

 

‘Clock Synchronization in MAFT’, Proc. 19th Int. Symp. on Fault-Tolerant Computing, Chicago, pp. 142-149, June 1989.

 

‘A Network Architecture for Radar Signal Processing’, Proc. 8th Digital Avionics Sys. Conf., San Jose, pp. 614-621, Oct. 1988.

 

‘The MAFT Architecture for Distributed Fault-Tolerance’, IEEE Trans. Comp., v. TC-37, n. 4, pp. 398-405, Apr. 1988.

 

MAFT: A Multicomputer Architecture for Fault Tolerance in Real-Time Control Systems’, Proc. IEEE Real Time Systems Symp., San Diego, pp. 133-140, Dec. 1985.

 

Computation of the Singular Value Decomposition on a Quadratic Array of Processors, Ph.D. Dissertation, Cornell University, May 1983.

 

‘An Algorithm and Simulation Results for a Systolic Array Computation of the SVD’, Proc. IEEE International Large Scale Sys. Symp., Virginia Beach, pp. 93-97, Oct. 1982.

 

‘Systolic Array Computation of the Singular Value Decomposition’, Proc. SPIE 341, Real-Time Signal Processing, Arlington, pp. 35-43, V.J. Trumble, ed., May 1982.

 

2 Paper copies are provided as a courtesy. Papers are copyright by their respective copyright holders.

 

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